| wall_system Project Status (10/14/2015 - 16:57:54) | |||
| Project File: | Wall.xise | Parser Errors: | No Errors |
| Module Name: | wall_system | Implementation State: | Fitted |
| Target Device: | xc9572xl-5VQ44 |
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No Errors |
| Product Version: | ISE 14.7 |
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10 Warnings (10 new) |
| Design Goal: | Balanced |
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| Design Strategy: | Xilinx Default (unlocked) |
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| Environment: | System Settings |
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| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | Fri Oct 16 16:18:57 2015 | 0 | 10 Warnings (10 new) | 1 Info (1 new) | |
| Translation Report | Current | Fri Oct 16 16:19:02 2015 | 0 | 0 | 0 | |
| CPLD Fitter Report (Text) | Current | Fri Oct 16 16:19:04 2015 | 0 | 1 Warning (1 new) | 1 Info (1 new) | |
| Power Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| Post-Fit Simulation Model Report | |||