Loop_Detector Project Status
Project File:	Looping.xise	Parser Errors:	No Errors
Module Name:	Loop_Detector	Implementation State:	Fitted
Target Device:	xc9572xl-5VQ44	Errors:	No Errors
Product Version:	ISE 14.7	Warnings:	No Warnings
Design Goal:	Balanced	Routing Results:
Design Strategy:	Xilinx Default (unlocked)	Timing Constraints:
Environment:	System Settings	Final Timing Score:

 

Detailed Reports						[-]
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report	Current	Mon Aug 31 11:51:19 2015	0	0	0
Translation Report	Current	Mon Aug 31 11:51:27 2015	0	0	0
CPLD Fitter Report (Text)	Current	Mon Aug 31 11:51:30 2015	0	1 Warning (1 new)	0
Power Report

 

Secondary Reports			[-]
Report Name	Status	Generated
ISIM Simulator Log	Current	Mon Aug 31 12:13:14 2015
Post-Fit Simulation Model Report

Date Generated: 10/21/2017 - 20:33:17