OS for Embedded Real-Time Systems
ROSE – reflective OS for embedded real-time systems
DEMOS – OS communications mechanisms implemented on FPGA
Distributed OS – making remote resource access more efficient
Analysis, Modelling and Simulation
Timing Analysis for Embedded Real-Time Systems – including limited parallel, multiprocessor and distributed systems
STRESS – simulator for real-time embedded systems
Languages and Compilers
York Hardware Ada Compiler – Ada compilation direct to FPGA
JavaMen – implementation of the Real-Time Java virtual machine on FPGA
Architectures
RT-Fusion - encorporating real-time aspects into embedded systems architectures
Industrial
DCSC – real-time systems engineering research for BAE SYSTEMS
York Hardware Ada Compiler
The York Hardware Ada Compiler (YHAC) has been developed over the last 4 years. It compiles a subset of Ada directly to FPGA (actually to EDIF). YHAC compiles a static concurrent subset of the Ada language, that is adopts both the SPARK and Ravenscar subset standards. These standards were developed (by the Ada community) to address the needs of safety-critical real-time systems. The subsets ensure that any compliant program is statically analysable for its timing and resource usage properties, including concurrency. The YHAC compiler allows totally traceable compilation from Ada to FPGA, with predicitable timing, which are key benefits for safety-critical real-time systems.
Status on 3rd March 2005 – YHAC being documented for public release.
Key Researchers: Michael Ward
Sponsors: UK Government (EPSRC), BAE SYSTEMS
Advancement of the YHAC compiler is being undertaken to adopt a different compilation strategy. Currently, the YHAC utilises an approach that means that circuit size increases linearly in the lines of Ada code. For scalability reasons, we are investigating utilising alternative approaches that decrease the circuit size, whilst retaining the properties of traceable compilation and predictable timing.
Status: work started on 1st October 2004.
Key Researchers: Pete Lewis
DEMOS
Small embedded systems require efficient implementations of restricted Operating System functions. Communications functions are of key importance to ubiquitous distributed embedded systems. The DEMOS (here.Digitally Enhanced Micro Operating System) project aims to provide an Operating System accelerator concentrating upon moving Operating System communications functions into hardware.
The project is focussing upon provision of the Styx protocol (from the Inferno OS) upon FPGA. Styx is a protocol that allows access to remote resources in an efficient manner. The Styx protocol component, implemented in VHDL, is intended to be used as a SoC component by sister projects within the Amadeus Centre at York.
The DEMOS project website is here
Status on 3rd March 2005 – Styx component is implemented and being tested.
Key Researchers: Ameet Patil / Rui Gao
Sponsors: UK Government (DTI)
Partners: Vita Nuova
Timing Analysis for Embedded Real-Time Systems
Timing analysis for real-time systems has historically been of concern. Traditionally, such analysis has assumed conventional CPU-memory platforms, examining process scheduling algorithms, resource blocking, operating system and I/O overheads. The usual computational model is that processes execute entirely upon the CPU, being potentially pre-empted by higher priority processes, or blocked on resource access by lower priority proceses.
Within this work, we are addressing a more practical embedded systems computational model, where computation can be performed either on the CPU or upon a co-processor (hardware accelerator) – when computation occurs on the co-processor, the CPU can be allocated to another process. This model has been termed the limited parallel model. It is being extended for multiprocessor and distributed systems.
Status: Project running since 1st October 2003. Currently, multiprocessor and distributed aspects are being investigated.
Key Researcher: Konstantinos Bletsas
STRESS – Simulator for Real-Time (Embedded) Systems
It seems like the STRESS simulation language was first developed a long time ago. It was – way back in the early 1990's. However, we have dragged it out of retirement, as we move to combined simulation and analysis approaches for accurate assessment of real-time behaviour. STRESS can be used at different levels – from simple tasks and scheduling algorithms; through representation of RTOS functions; through full distributed / multiprocessor architectures including networks / protocols etc. Note that STRESS was never an attempt at performing cycle accurate simulations (in the EDA sense), but a faithful simulation of the timings that are part of real-time systems models.
Status: Project running since 1991 – now brought out of retirement – public release soon available.
ROSE – Reflective OS for Embedded Systems
The ROSE project is concerned with the provision of an operating system for embedded real-time systems that can be extensively optimised and specialised to a specific application. Whilst this can be done statically, offline, ROSE addresses the issue of online (dynamic) specialisation by the provision of reflection. With this mechanism, applications can view key OS information about themselves and the system in general; and are able to modify the behaviour of themselves and the OS, depending upon the prevailing status. A simple example is scheduling, where an application can alter scheduling parameters dynamically.
Status: started on 1st October 2003. Currently (3rd March 2005) basic reflection implemented and being evaluated.
Key Researchers: Ameet Patil
Distributed OS
The efficient remote access of resources in embedded systems is crucial, where insufficient local resources are available for the computation, either by design (low-resource system), or by exhaustion (eg. low battery). Unfortunately, the remote access of resources is inefficient due largely to the structures and mechanisms imposed by conventional OSs. This project seeks to reduce the bias of OSs towards local resources by implementing low-level mechanisms and policies that allow efficient remote resource access.
Status: started on 1st October 2003. Currently (3rd March 2005) basic mechanisms being implemented.
Key Researchers: Paul Usher
JavaMen
This project is implementing a minimal Real-Time Java Virtual Machine to run on a minimal CPU / dedicated hardware combination. The RTJVM allows Real-Time Java applications to function on a small-embedded device. Should a device not have sufficient resources to support the application, Java technology allows remote resources to be accessed. Furthermore, if necessary, the application can be moved to a different platform and executed without having to be re-compiled. Consequently, we will incorporate technology into the RTJVM that allows the resource requirements of the application to be evaluated, so that if sufficient resources are not available on the device, it can be moved transparently to a different device with sufficient resources. This work builds upon the prototype Ravenscar-Java virtual machine that is being developed within the Real-Time Systems Group in the Department.
The project is part of the Amadeus Centre at York. The emerging RTJVM will be used as a SoC component by other projects in the centre.
Status: Project due to start on 1st May 2005.
Key Researchers: Andrew Borg
Sponsors: UK Government (DTI)
Partners: Sun Microsystems
Language Frameworks for Embedded Systems
Usually behavioural language frameworks used for specifying / describing embedded real-time systems are monolithic (Ada, VHDL, SpecC) attempting to represent many aspects (potentially everything) in one language; or are an ad hoc combination of a number of languages addressing different issues; or are library extensible, in that standard libraries are used to extend the semantics of the language (eg. Java, C). There are good / bad arguments for all of these. This project seeks to examine how a language framework can be built that allows extension via domain specific (embedded) languages, to enable greater expressibility of application concerns including both functional (behaviour) and non-functional (time, space, layout, power etc). New domain specific or application specific languages can be designed and added when needed (to address further concerns), whilst maintaining semantic consistency.
Status: Project started on 1st October 2004.
Key Researchers: Matthew Naylor
RT-Fusion
Many aspects of real-time systems can be incorporated into conventional architectures for embedded systems to improve the overall timeliness of the platform. For example, modifying the underlying platform (potentially dynamically) to better meet the needs of the real-time application, and to improve its timeliness, will produce better embedded real-time systems. Early work is examining the relative effectiveness of embedded system architectures such as ASIP, co-processor and dynamic code compilation to hardware (WARP) and the potential for encorporating real-time considerations.
Status: Project started on 1st October 2004.
Key Researcher: Jack Whitham
DCSC – Real-Time Systems Engineering
Within the BAE SYSTEMS Dependable Computing Systems Centre (DCSC), the Real-Time Systems Engineering strand has tradiationally addressed the implementation aspects of real-time systems development. Particular areas of focus have included scheduling and timing analysis - static priority-based schemes, cyclic schemes, communication networks and protocols; worst-case execution time analysis and hardware models; real-time programming languages - Ada 95 language definition and application; real-time kernels - specification and implementation guidance. Recently, efforts have moved towards architecture assessment and trade-off analysis - how to assess system design options and make trade-offs between different non-functional properties of the system; the use of FPGAs as an alternative platform to COTS microprocessors - how to host software on an FPGA and verify that its behaviour is correct.
Key Researchers: Michael Ward
Sponsors: UK Government (EPSRC), BAE SYSTEMS