My current main research interest is into Hard Real-Time Scheduling of Partially Reconfigurable Field Programmable Gate Arrays (PR-FPGA's).
Many issues in this field are difficult to tackle, scheduling itself isn't a trivial problem due to it NP-hard nature. The EPSRC funding of my PhD placement on the Time-Driven Modelling and Resource Management of Real-Time Systems on Multiprocessor Systems-on-Chip (TEMPO) project has given me the opportunity to pursue this research and while currently only five months into the PhD I am open minded about the direction of this piece of research.