Microcomputer Project - Frequency Generation

Probably every MCP project will require you to generate a tone, clock, or other form of digital (hardware) signal at a particular frequency. There are several ways of doing this. Of these, some use oscillators (familiar from the analogue part of the DLD module), and others take a signal at a ``master'' frequency (e.g. the system clock) and derive the desired frequency from that.

Here are some of the ways of generating a signal at a desired frequency.

1. Use the crystal oscillator on the MCP board. A crystal is a lump of rock with metal plates soldered on to it. It oscillates mechanically - in the case of the MCP crystal, at 12.288 MHz. The available signal - the ``system clock'' - is at half that frequency: 6.144 MHz. If that is the frequency you need, then fine; if not, then see 3 or 4 below.

2. Buy or build your own crystal oscillator. A wide range of frequencies is available, and you can even have a crystal ground specially to your own choice of frequency, although that is likely to be expensive.

3. Use a divider to divide a given frequency by an integer n. This can be a hardware divider or a software divider.

   Hardware divider:

   A hardware frequency divider is a divide-by-n counter. Refer to your DLD notes (the digital part). Two eight-bit counters are provided on-chip; they are called ``Programmable Reload Timers''. It is common in practice to find that 8 bits are not enough to generate the frequency you need with sufficient accuracy. If that is the case, consider one of the large number of 16-bit programmable counters which are available.

   Software divider:

   		inc	(hl)
   		ld	a,(hl)
   		sub	n
   		jr	nz,L1
   		ld	(hl),a
   	L1:
   	

   The byte pointed to by HL (acc, say) is incremented in the sequence
   0, 1, . . . , n-2, n-1, 0, 1, . . . .
   If the sequence of code above is executed f_s times per second, perhaps in an interrupt routine, then the top bit of acc will toggle at frequency f_s/n. If n = 256, the code can be optimized to just one instruction.

4. Use the software ``Direct Digital Synthesis'' technique. Again, assume that HL points to a byte called acc.

   		ld	a,(hl)
   		add	k
   		ld	(hl),a
   	

   Suppose the sequence of code above is executed f_s times per second, perhaps in an interrupt routine. It is not too difficult to see that the top bit of acc toggles at frequency
   f = k f_s / 256.
   Try ``executing'' the code fragment repeatedly in your head, for several values of k (in particular 0, 1, 2, 128), to see how it works.